Spartan-II FPGA
Features
• Second generation ASIC replacement technology
– Densities as high as 5,292 logic cells with up to 200,000 system gates
– Streamlined features based on Virtex® FPGA architecture
– Unlimited reprogrammability
– Very low cost
– Cost-effective 0.18 micron process
• System level features
– Select RAM™ hierarchical memory:
· 16 bits/LUT distributed RAM
· Configurable 4K bit block RAM
· Fast interfaces to external RAM
– Fully PCI compliant
– Low-power segmented routing architecture
– Full readback ability for verification/observability
– Dedicated carry logic for high-speed arithmetic
– Efficient multiplier support
– Cascade chain for wide-input functions
– Abundant registers/latches with enable, set, reset
– Four dedicated DLLs for advanced clock control
– Four primary low-skew global clock distribution nets
– IEEE 1149.1 compatible boundary scan logic
• Versatile I/O and packaging
– Pb-free package options
– Low-cost packages available in all densities
– Family footprint compatibility in common packages
– 16 high-performance interface standards
– Hot swap Compact PCI friendly
– Zero hold time simplifies system timing
• Core logic powered at 2.5V and I/Os powered at 1.5V, 2.5V, or 3.3V
• Fully supported by powerful Xilinx® ISE® development system
– Fully automatic mapping, placement, and routing
نقد و بررسیها
هنوز بررسیای ثبت نشده است.